Plenary Speakers
Bram Nauta, University of Twente
High Risk, No Gain
Conventional radio receivers place amplifiers at the front of the signal chain, a component still considered indispensable. This talk argues that amplifiers may be unnecessary in many cases and that removing them unlocks meaningful performance and efficiency gains.
The first part introduces mixer-first receiver architectures, which replace the low noise amplifier at the antenna with a low-loss passive mixer. Combined with N-path filtering, a powerful technique from a forgotten era, these architectures deliver selectivity directly at the antenna input, providing strong interference resilience without active amplification.
The second part extends this philosophy to the baseband domain. A fundamental thermodynamic argument shows that a comparator and an amplifier require the same energy when normalized for noise and bandwidth. Conventionally, an amplifier chain amplifies the signal to the 1V range, to drive an ADC. This theory shows that the ADC can in principle process small signals directly. It will dissipate more power to maintain noise performance while reclaiming the power previously spent in the amplifier chain driving the ADC
Together, these ideas outline a roadmap toward fully passive receiver frontends and may ultimately challenge conventional receiver architectures
Francesc Moll, UPC/BSC
Beyond the Logic Core: RISC-V, Mixed-Signal Bottlenecks, and the Path to Sovereign European HPC
High-Performance Computing (HPC) sits at the epicenter of technological sovereignty, driving everything from exascale AI and climate modeling to national security. While initiatives like the European Processor Initiative (EPI), EUPilot, DARE, and the Barcelona Zettascale Lab have successfully demonstrated that open-standard RISC-V logic (CPUs, VPUs, and AI accelerators) can power future supercomputers, a critical reality remains: compute silicon does not exist in a vacuum.
A sovereign CPU or vector unit is only as capable as the system supporting it. This keynote explores the architectural anatomy of sovereign HPC compute engines and confronts the “missing pieces” in the European design ecosystem. We examine why the key bottlenecks to true hardware independence are shifting from digital logic to advanced analog/mixed-signal IP (PHYs for HBM3/4, LPDDRx, PCIe, and UCIe die-to-die chiplet interfaces), open EDA scaling, and 2.5D/3D packaging realities. Finally, we highlight the central role of Academia and Research Technology Organizations (RTOs) in training the next generation of microelectronic engineers, bridging the lab-to-fab gap through pilot lines, and using open-source IP to transform theoretical research into physical, production-ready silicon.
Alberto Rodriguez-Perez, KD
Bringing Optical Communications to Automotive: Transistor-Level Design is Just the Starting Point
Transitioning a high-speed microelectronics concept from a startup vision to a high-volume, automotive-grade reality demands far more than sound circuit topology: it requires complete ownership of technology, silicon IP, and the backend supply chain.
This keynote traces the evolution of KD (kd.tech) as it pioneered rugged optical communication links for harsh vehicle environments. Attendees will follow the company’s trajectory from a fabless startup to an integrated automotive Tier-2 supplier. To satisfy the stringent reliability, functional safety, and cost requirements of the automotive sector, KD transitioned to designing proprietary high-speed transceiver IPs, developing custom optoelectronic packaging, and deploying an in-house assembly and production test line.
The talk unpacks the practical realities of high-speed AMS design under automotive environmental extremes, the often-underestimated challenges of optical packaging and co-design, and how the traditional IC designer’s role expands when a company takes direct command of manufacturing and quality control.
